• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Systems and methods for limiting image delay for a current mirror buffered direct injection output circuit are disclosed. A photodetector device is coupled to a buffered direct injection (BDI) circuit, in which an operational amplifier and other elements communicate the output signal from the detector to subsequent stages. The output of BDI is passed to a first current mirror which can be implemented as a Säckinger current mirror. The first current mirror is coupled to a second current mirror, an output of which is a fixed bias current. Image delay can be controlled by the fixed bias current, rather than the photoelectric current produced directly by the optical detector. In some aspects, the negative feedback provided by the first current mirror can increase the modulation of the second current mirror. This gain factor can reduce the image delay to a much lower point than the delay experienced by the known output circuit, modulated by a BDI current, without Säckinger current mirror.
    公开号:BE1023023B1
    申请号:E2014/0342
    申请日:2014-05-12
    公开日:2016-11-08
    发明作者:Lin Minlong
    申请人:Sensors Unlimited Inc；
    IPC主号:
    专利说明:

    IMAGE DELAY LIMITATION SYSTEMS AND METHODS FOR STAMPED DIRECT INJECTION OUTPUT WITH CURRENT MIRROR
    FIELD
    [1] The present invention relates to image delay limitation systems and methods for current mirror buffered direct injection output circuits, and more particularly to platform technologies and techniques for reducing settling time in sensors. Optics using direct injection output.
    CONTEXT
    [2] In the field of optical sensors, the use of optical sensors for detecting infrared (IR) and other spectra is known. Optical detectors such as InGaA (Indium Gallium Arsenide) or other sensors in the IR band and in other frequencies have been deployed in a focal plane with silicon output circuits. Usually, the current output from the detector device has been routed to an integration capacitor through an injection MOSFET which, in turn, is controlled by a transfer gate to reduce the reverse detector polarization variations that have been detected. place due to changes in the photoelectric current. This configuration is called a Buffered Direct Injection (BDI) output circuit. A BDI circuit configuration according to known implementations is shown in FIG. 1 [3] The output from the BDI portion of these implementations can be routed to a current mirror, as also shown in FIG. 1. The current mirror serves to either amplify or attenuate the input photoelectric currents to detect day and night scenes. By varying the voltage differences between BIAS and GAIN in FIG. 1, the relationship between Lortie and Untrée in FIG. 1 can vary by several orders of magnitude. The right side of the network is used to reset an integration capacitor used to regulate the timing of the light concentration interval performed by the BDI circuit or other output circuits.
    [4] However, in BDI implementations such as those appearing in FIG. 1, there are difficulties in performing the optical detection and in the output produced by the BDI circuit or the current mirror circuits. Specifically, and as shown for example in FIG. 2, the opening characteristics of the current-mirror portion of the circuit, when it is controlled by the buffered current produced by the BDI portion of the circuit, can cause a significant delay in the stabilization time of the current scene. recording, especially when there is a large variation in the amount of luminance in the scene.
    [5] That is, and as also shown in Fig. 2, when a BDI circuit or other output circuit picks up a high brightness variation image in consecutive scenes, the output circuit can not not respond to variations in scene brilliance within a reasonable time. In Figure 2, a bright scene appears in frame 0, while in frame 1, full brightness can no longer be displayed. In fact, the full brightness can only appear in frame 2. This is called the "front end" delay in Figure 2. Then in frame 2, the bright scene becomes a dark scene, and the display takes much more time to stabilize in dark scenes in an effect shown in FIG. 2 as a "back end" delay. During this type of burst or other transition, the detection device may not be able to respond quickly enough to the rapid variation of the overall luminance of the scene to accurately produce the values of the output signals. This image delay is partly due to a charge / discharge of the capacitor of the current mirror portion of the circuit of FIG. 1. The back end delay time constant, Qb, can be estimated by the following expression: □ & RC.
    [6] R represents the real impedance at the current mirror gate node and can be of the order of several hundred giga-ohms in the black scene. A simple estimate of R can be related to the transconductance, gm, of the transistor Min in FIG. 1. R Dl / gm D (1.5 * 1 <T / q) / Untré, where k represents the Boltzmann constant, T the temperature , q the charge of the electron and untrace the photoelectric current. If T = 300 ° K and the photoelectric current = 0.1 pA, R is almost 400 GΩ. C represents the actual capacity at the current mirror gate node. This means that from the bright scene to the dark scene, the time constant to stabilize the discharge of the current mirror gate node can be several tens of milliseconds. Since the usual image time is 33 ms, it is not surprising that the back end image delay can last several images, which can significantly affect image quality or accuracy, under transitional luminance.
    [7] It may be desirable to provide image delay limiting methods and systems for current mirror buffered direct injection output circuits, in which optical sensors can produce image signals by the bias of a portion of BDI which on its side feeds a current mirror topology which gives an improved response time to modify image conditions.
    DESCRIPTION OF THE DRAWINGS
    [8] The accompanying drawings, which are incorporated in this specification and constitute a part thereof, illustrate embodiments of the present teachings and taken in conjunction with the description, serve to explain the principles of the present teachings. Among the figures: [9] Figure I illustrates optical detection systems employing BDI circuits, according to known implementations; [10] Figure 2 illustrates signal response characteristics of optical systems shown in Figure 1 under transition conditions from full light to dim light; and [11] Fig. 3 illustrates a global optical detection system incorporating BDI and current mirror circuits according to various aspects of the present teachings.
    DESCRIPTION OF EMBODIMENTS
    [12] Embodiments of the present teachings relate to image delay limitation systems and methods for current mirror buffered direct injection circuits. More particularly, embodiments relate to platforms and techniques for collecting signals produced by optical sensors from an InGaAs or other sensor array, with a reduction in the delay time required for the output of the sensors. stabilizes during a transition from a high-gloss scene to a low-gloss scene, or during other transitions in the imaging environment.
    [13] Reference will now be made to exemplary embodiments of the present teachings, which are illustrated in the accompanying drawings. Whenever possible, the same or similar reference numerals throughout the drawings will be used to designate identical or similar parts.
    [14] Fig. 3 illustrates a set of global circuits 300 in which the image delay limitation systems and methods for direct current buffered injection circuits can operate, depending on the implementations. Of the aspects shown, this circuit 300 may contain a module 302 of BDI. The BD1 module 302 may include an optical detector 304 which may be or include an InGaAs detector or other optical sensing element. In some implementations, the optical detector 304 may be configured for improved low level performance, for example, to be liquid-cooled for lower background noise and for lower light sensitivity. The light which limits the optical detector 304 can trigger a current flow through a transfer gate section consisting of a transistor 308 coupled to an operational amplifier 306. The output provided by the BDI module 302 can be coupled to a first one. current mirror 310.
    [15] The first current mirror 310 may contain elements configured to provide a current mirror function, in particular a first transistor 312 (labeled Msf) and a second transistor 314 (marked Min). According to some embodiments, the first current mirror 310 may be or contain a Säckinger current mirror, which may operate or operate as a reduced version of a regulated cascode current mirror.
    [16] In embodiments such as that shown, the set of circuits 300 may further comprise a second current mirror 330. The second current mirror 330 may contain the second transistor 314, as well as a third transistor 326. (marked Mut). In addition, the circuitry 300 may include a reset switch module 320, which may function to reset an integration capacitor 324 through a reset switch 322 to charge the integration capacitor 324. for a new frame or for another interval between images.
    [17] In some aspects, the current Isf can drive the current output on both sides of the second current mirror 330, which in turn generates an amplified / attenuated photoelectric current produced by the optical detector 304 by varying the voltage difference between POLARITY and GAIN (eg as shown in Figure 1). The current Ibias reflects the current transmitted through the first current mirror 310, and may be a fixed current value. In some aspects, the delay limitation of the detected image can be controlled by the modulation current of Isf, rather than by the value of the photoelectric current produced by the optical detector 304. The current Isc can, on the other hand, reflect a current of charge / discharge from the gate node of Min and Mout in FIG. 1. As a function of the variation of the voltage value Vsfc from the luminous brightness, the current Isf and the gate charge / discharge current of the mirror current 310 are modulated one against the other with respect to the constant current Ibias in Figure 1. When a bright scene transits to a dark scene, the decrease in the value of VsFGva reduce Isf, which will increase the current of discharge of the grid node of Min and Mout, as Ibias is fixed. This accelerated discharge current from the gate node of Mm and Mout should have the effect of reducing the back end delay. In some aspects, the same principle applies to the limitation of the front end delay. In some aspects, the negative feedback provided by the first current mirror 310 may increase the modulation of the first transistor 312 by a factor of (gm-Min) / (gds-Min). This gain factor can control the image delay produced by the BDI module 302 and the current mirror circuit to a much lower point than the delay experienced by the known current-driven BDI driven output circuit. It is thus possible to obtain faster, less parasitic and / or more accurate image production in the IR or other bands.
    [18] It may be noted that the set of general circuits 300 comprising BD1 302, the first current mirror 310, the second current mirror 330 and the reset switching module 320 can be implemented as the detector element. for a single pixel in a focal plane arrangement. Many of these pixel elements can be manufactured in a large scale integration (LSI) to form an integrated detection unit that can produce images of a large number of combined pixels, the output of each of which is regulated by circuits and techniques described here. The global sense unit can still be configured to capture images in the IR band and / or other frequency ranges.
    [19] The foregoing description is illustrative, and alternative configurations and implementations may be contemplated by specialists. For example, while embodiments have been described in which a BDI module 302 is configured using an operational amplifier 306, a transistor 308 and an optical detector 304 configured according to a certain arrangement. in some embodiments, these elements may be configured according to different topologies or arrangements and / or may be substituted by other electrical elements. Also, while the first current mirror 310 and the second current mirror 330 are illustrated as being configured with certain transistor elements in illustrative arrangements, it will be appreciated that in some embodiments these elements may also be configured according to different topologies or arrangements, and / or replaced by other electrical elements. Other resources described as singular or integrated may in some embodiments be plural or distributed, and resources described as multiple or distributed may in some embodiments be combined. The scope of the present teachings therefore aims to be limited only by the following claims.
    权利要求:
    Claims (15)
    [1]
    A circuit comprising: a buffered direct injection (BDI) module, the BDI module comprising: an optical detector, and a transfer gate connected to an output of the optical detector; a first current mirror, coupled to the BDI module, the first current mirror producing a modulation current according to the output of the optical detector. a second current mirror, coupled to the first current mirror, the second current mirror being configured to produce a photoelectric current either amplified or attenuated, usable to optimize an image generation time and the brightness of a scene of the optical detector ; and a reset circuit coupled to the second current mirror and configured to reset an integrating capacitor which integrates an image signal according to the output of the optical detector.
    [2]
    The circuit of claim 1, wherein the optical detector comprises an Indium Gallium Arsenide (InGaAs) device or other IR device.
    [3]
    The circuit of claim 2, wherein the InGaAs device or other IR device is configured to detect images in the infrared frequency range.
    [4]
    The circuit of claim 1, wherein the transfer gate comprises an operational amplifier.
    [5]
    The circuit of claim 1, wherein the first current mirror comprises a Säckinger current mirror.
    [6]
    The circuit of claim 1, wherein each of the first and second current mirrors comprises a pair of coupled transistors.
    [7]
    The circuit of claim 6, wherein the first current mirror and the second current mirror share at least one transistor.
    [8]
    8. Circuit according to claim 7, wherein the second current mirror comprises at least one output transistor for transmitting the image signal.
    [9]
    The circuit of claim 1, wherein the first current mirror produces an increase in modulation of the modulated current through negative feedback.
    [10]
    The circuit of claim 1, wherein the reset circuit comprises a switching transistor coupled to the second current mirror.
    [11]
    An image production system, comprising: a buffered direct injection controlled (BDI) optical detector element focal plane array, wherein each BDI controlled optical detector element comprises: a buffered direct injection module ( BDI), the BDI module comprising: an optical detector, and a transfer gate connected to an output of the optical detector; a first current mirror, coupled to the BDI module, the first current mirror producing a modulation current according to the output of the optical detector. a second current mirror, coupled to the first current mirror, the second current mirror being configured to produce a photoelectric current either amplified or attenuated, usable to optimize an image generation time and the brightness of a scene of the optical detector ; and a reset circuit, coupled to the first current mirror and configured to reset an integrating capacitor which integrates an image signal according to the output of the optical detector; wherein each BDI-controlled optical detector element is made of a common substrate.
    [12]
    The system of claim 11, wherein the optical detector of each BDI module comprises an InGaAs device or other IR device.
    [13]
    The system of claim 12, wherein the InGaAs detector or other IR detector of each BDI module is configured to detect images in the infrared frequency range.
    [14]
    The system of claim 12, wherein the transfer gate of each BDI module comprises an operational amplifier.
    [15]
    The system of claim 12, wherein the first current mirror comprises a Säckinger current mirror.
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    法律状态:
    优先权:
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